FPGA Verification Engineer - 50 - 60 EUR/hr - Tampere, Finland

Beschreibung

FPGA Verification Engineer - 50 - 60 EUR/hr - Tampere, Finland - Fluent English - Immediate Start - 100% Onsite - +12 Months

My client based in Tampere, Finland are currently searching for 6 FPGA Verification Engineers to start immediately for a project lasting +12 Months.

Competence Requirements:

• Min 7 years of advanced ASIC and/or FPGA simulation verification
• Expertise in System Verilog UVM
• Knowledge in VHDL and Verilog
• Actively worked with (beneficial) or participated in Verification environment architecture definition

Additional Skills:

• Matlab
• Python and/or C/C++ in testcase development