Verfication Engineer

AT  ‐ Vor Ort
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Beschreibung

Good afternoon

My client In Austria Urgently seek a contract verification design engineer to work on top level design at ASIC level.

The end deadline is July and then there is a likelihood for an extension.

The design work will be done in parallel to the verification so you will need to write a set of test cases in order for this product to be tested correctly and of course documented.

You will work on a mixed signal ASIC device and work on block level up to application level.

Skills

Writing test cases in Verilog or system Verilog

Working on mixed signal ASIC.

Block level verification

There will be modelling involved

Send me the CV ASAP

Start
ab sofort
Dauer
3 months
Von
Vivid Resourcing Ltd
Eingestellt
23.05.2016
Projekt-ID:
1134631
Vertragsart
Freiberuflich
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