IP Verification Engineer

Kärnten  ‐ Vor Ort
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Schlagworte

C VHDL Verilog Test cases Test

Beschreibung

IP Verification, Verilog, VHDL, SystemVerilog, C, UVM, Digital IP

eCRM Euro are looking for a team of Digital IP Verification Engineers for a project in Austria

Your responsibilities for this project include the following

Verification of digital IPs written in VHDL/Verilog with SystemVerilog and C
Definition and implementation of verification concepts with SystemVerilog/UVM
Generation of randomized testcases
Setup regression flows
Write assertion
Write scoreboards, monitors
Extension of available test cases written in SV and C

Required experience and skills are as follows

Specialist in System Verilog and UVM
Experience in C
Experience in VHDL/Verilog

eCRM Euro are a leading IT consultancy working across Europe in various industry Verticals.

Start
May 2016
Dauer
6 months +
(Verlängerung möglich)
Von
eCRM Euro Ltd
Eingestellt
16.03.2016
Projekt-ID:
1092570
Vertragsart
Freiberuflich
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