Profilbild von Michael Kogan Digital ASIC Entwickler, Ic digital layout, Cadence, DFT, floorplan, placement, timing closure, timi aus Muenchen

Michael Kogan

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Letztes Update: 09.08.2018

Digital ASIC Entwickler, Ic digital layout, Cadence, DFT, floorplan, placement, timing closure, timi

Abschluss: Dipl.-Informatiker (BA)
Stunden-/Tagessatz: anzeigen
Sprachkenntnisse: deutsch (verhandlungssicher) | englisch (verhandlungssicher) | russisch (Muttersprache) | ukrainisch (verhandlungssicher)

Dateianlagen

michael_kogan_cv.pdf

Skills

• Multicultural, Multilanguage, digital ASIC Design Engineer with more than 20 years experience (Taped out more than 20 designs).
• Have experience and technical skills allowed me to span the very wide range of Digital ASIC implementation flow (RTL to GDSII) in literally every single part of the flow.
• Have deep familiarity and hands on experience in physical implementation of Digital ICs in Automotive, Wireless Communications, Mobile Digital TV, Mobile Phones Hand held Devices, and more, as well as System on Chip, High Speed, High Density and Low Power designs on the edge of technology process.
• Project planning, implementation, monitoring and quality validation.
• Customer ramp-up, methodology and design environment setup, know-how transfer.
• Self-motivated, working well as an individual or as part of a team, and able to work under high pressure.

Projekthistorie

Guenther Schroeder guenther@cadence.com
Jens Werner jens@cadence.com

Reisebereitschaft

Verfügbar in den Ländern Deutschland, Österreich und Schweiz
flexibel

Sonstige Angaben

Looking for new contract to start on September 10 2018
Profilbild von Michael Kogan Digital ASIC Entwickler, Ic digital layout, Cadence, DFT, floorplan, placement, timing closure, timi aus Muenchen Digital ASIC Entwickler, Ic digital layout, Cadence, DFT, floorplan, placement, timing closure, timi
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