Profilbild von Massimiliano Giacometti Electronic Engineer aus Muenchen

Massimiliano Giacometti

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Letztes Update: 06.09.2022

Electronic Engineer

Abschluss: Master in Elektronik Ingenieurwissenschaft
Stunden-/Tagessatz: anzeigen
Sprachkenntnisse: deutsch (gut) | englisch (verhandlungssicher) | französisch (verhandlungssicher) | italienisch (Muttersprache)

Dateianlagen

CV_giacometti.pdf

Skills

Team leading
Computer architecture
RISC-V
FPGA/ASIC design and
verification
System modeling
FW/SW design and verification
Signal processing
Xilinx Vivado and ISE
Synopsys VCS
Design Compiler
Mentor Modelsim
GCC
VHDL/Verilog/SystemVerilog
SystemC
C/C++
Python
Perl

Projekthistorie

06/2018 - bis jetzt
Head of Hardware Development
Hensoldt Cyber GmbH (10-50 Mitarbeiter)

Responsible for the development of the MiG-V chip family

05/2011 - 06/2018
FW/SW Engineer
INTEL MOBILE COMMUNICATIONS (Telekommunikation)

Development and verification of the FW and virtual prototype of a DMA (Forth and SystemC)

08/2016 - 12/2017
SW Engineer
INFINEON

Development of the virtual prototype of smartcard chips (SystemC)

03/2015 - 11/2015
FPGA Engineer
PHLUIDO (Telekommunikation, < 10 Mitarbeiter)

FFT HW acceleration based on Zynq and related Linux driver (Xilinx tcl and C)

03/2015 - 04/2015
FPGA Engineer
MAVIGEX (Telekommunikation, < 10 Mitarbeiter)

S-M2M modulator (C and VHDL)

06/2013 - 12/2013
FPGA Engineer
MINDWAY (Telekommunikation, 10-50 Mitarbeiter)

BCH + LDPC encoder development for DVB-T2 (VHDL code and C++ model)
Turbo encoder development for an FSIM modulator (VHDL code and C++ model)

Reisebereitschaft

Weltweit verfügbar
Profilbild von Massimiliano Giacometti Electronic Engineer aus Muenchen Electronic Engineer
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