Beschreibung
Analog/RF Layout Engineer- Physical Design, CMOS, RF, ABCD, Cadence
My client is a multinational consultancy currently seekinf a Analog/RF Layout Engineer- Physical Design, CMOS, RF, ABCD, Cadence, for a 6-month contract in Austria.
The ideal candidate must have:
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5-10 years' experience in CMOS technology (140nm and/or below).
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Good understanding about RF design/ABCD technology (high voltage), Matching structures.
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Tool skills required: Cadence virtuoso 6.1.6, Cadence PVS, Cadence Quartus/Assura/QRC.
Analog/RF Layout Engineer- Physical Design, CMOS, RF, ABCD, Cadence - 6 month Contract